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PLCIO Blog
 
11/2017 - Version 4.5.2
02/2017 - Version 4.5.1
12/2015 - Version 4.5.0
10/2014 - Version 4.4.1
01/2013 - Version 4.4.0
06/2011 - Web Site Update
02/2011 - Version 4.3.1
01/2011 - Version 4.3.0
06/2010 - Version 4.2.1
12/2009 - Version 4.2.0
01/2008 - Version 4.1.1
10/2007 - Using "testplc" for basic communications testing
08/2007 - Replacing A-B INTERCHANGE with PLCIO
08/2007 - Determining array size in a ControlLogix PLC
New PLCIO Version 4.1.1 Released
Version 4.1.1 of the PLCIO communications software is now available. Release highlights include added support for Siemens Step7 400-series CPUs, and minor bugfixes for addressing timers and counters in the 'abeth' module.

Full Changelog:
  • Use more conservative timeout values when scanning for CPUs on a ControlLogix rack.
  • Added new modes of operation (rreg, rcoil, rbyte, rlong, wreg, wcoil, wbyte, wlong) to the 'testplc' example program.
  • Added support for Step7 400-series CPUs.
  • Added auto-detection of the CPU in a Step7 rack, along with an optional "Slot=#" parameter to plc_open() such that the CPU slot can be specified manually.
  • Fixed the addressing of octal bit numbers (/0 through /17) and timer/counter sub-elements (.ACC, .PRE, etc) in Allen-Bradley PLCs.
 
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